C2S Scheme Aims to Produce 85,000 Industry‑Ready Chip Designers

New Delhi, Aug 14 – Central Electronics and IT Minister Jitin Prasad told Parliament that the Chips‑to‑Startups programme is designed to nurture a talent pool of 85,000 industry‑ready engineers in chip design. The initiative has already trained over 68,000 students across India.

Under the scheme, 332 educational institutions have been granted access to a suite of advanced EDA solutions from vendors such as Synopsys, Cadence, Siemens EDA, Ansys, Keysight, Silvaco, Renesas‑Altair, AMD‑Xilinx, and others. These tools enable hands‑on experience with modern semiconductor design workflows.

The collaborative effort has resulted in 254 successful tape‑outs. Of these, 175 designs were produced at the 180 nm node of the Design Service Center in Mohali, while 79 designs have been realized in foreign foundries, reflecting the global relevance of the work.

In Andhra Pradesh, 23 colleges have collectively utilized the EDA platforms for more than 434,000 hours, indicating substantial academic engagement. The ministry expects these projects to progress through design validation, prototype testing and eventual mass production.

The C2S programme forms a cornerstone of India’s strategy to become a hub for semiconductor design and innovation.